1. Field of the Invention
This invention relates to shottky transistor logic (STL) circuits and, more specifically, to such a circuit which has low output impedance.
2. Brief Description of the Prior Art
STL is relatively high impedance bipolar very large scale integration (VLSI) logic which operates from a two volt source. These types of circuits are finding increased use relative to logic circuts requiring higher voltage supplies, such as about five volts, due to the substantial decrease in power requirement, thereby increasing the number of components that can be placed on the chip without excess heating problems. Such STL circuits of the prior art utilize a resistor to drive the output therefrom (a transistor pulling the output low and a resistor pulling the output high). These prior art STL circuits are often required to drive long metal traces as parts of integrated circuits, which traces can have substantial capacitance and also are often required to overcome titanium tungsten (TiW) diode leakage on STL integrated circuits. It is apparent that such STL circuit arrangements inherently provide a high output impedance from the logic circuit to an external load due to the use of the resistor to drive the output. Therefore, if there is a high fan out (load on the output) or if there is a high capacitance on the output, the resistor will have great difficulty in pulling the output of the logic circuit high when a high logic level is to be provided. In addition, low output impedances are desirable in order to provide increased circuit operating speed. It is therefore readily apparent the STL circuits which are capable of operation with low output impedance will provide desirable characteristics as compared with prior art STL circuits.